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September 1, 2010 - Workshop on Hybrid Multi-core Computing

Workshop on Hybrid Multi-core Computing Held in conjunction with HiPC 2010 Goa, December 19, 2010
When Sep 01, 2010 12:00 AM to
Dec 19, 2010 12:00 AM
Where GOA, INDIA
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Workshop on Hybrid Multi-core Computing Held in conjunction with HiPC 2010 Goa, December 19, 2010 CALL FOR PAPERS The first Workshop on Hybrid Multi-core Computing will be held in conjunction with the 17th International Conference on High Performance Computing (HiPC) being held at Goa, India. The proposed workshop will focus on algorithmic, applied, and analytical issues in hybrid multi-core computing. The workshop aims at bringing together the researchers and practitioners in the rapidly evolving area of hybrid multi-core computing. Hybrid multi-core computing uses a mix of CPUs and special purpose accelerators to arrive at highly efficient, practical, and scalable solutions. This raises several important issues including the mechanism(s) to execute concurrently on a hybrid computing platform. The workshop will focus on issues emerging out of hybrid multi-core computing. The workshop shall feature invited talk(s) and also contributed research papers. Research papers addressing any of the topics listed below, and possibly beyond, in connection to hybrid multi-core computing are solicited. It is expected that papers are original, correct, and are of high technical quality. Papers should not be currently in submission at any workshop/conference/journal with a published proceedings. The topics of interest include, but are not limited to, the following. Hybrid computing algorithms and applications Programming models for hybrid multi-core computing Issues in hybrid multi-core computing such as load balancing, synchronization Paradigms for hybrid multi-core computing Performance issues and models for hybrid multi-core computing Programming languages and tools for hybrid multi-core computing SUBMISSION GUIDELINES The workshop seeks original, correct, and novel submissions of high quality that are not currently under review at any other venue. Submissions should not exceed eight (8) pages in the two column IEEE conference format including references, tables, and all other material. An appendix can be included but there is no guarantee that the appendix shall also be read by the reviewers. Submissions that deviate significantly from the above guidelines may not be considered. All submitted papers shall be reviewed by at least three independent reviewers before arriving at a decision. You can submit your papers using EasyChair at this URL. IMPORTANT DATES Submission deadline: September 1st, 2010 Acceptance notification: October 1st, 2010 Camera Ready deadline: November 1st, 2010 Workshop Date: Dec 19th, 2010 ORGANIZATION The workshop is jointly organized by IIIT Hyderabad and IBM, India. General Chairs P. J. Narayanan, IIIT Hyderabad, India. R. Govindarajulu, IIIT Hyderabad, India. Manish Gupta, IBM IRL, India. Organization Chair Suresh Purayat, IBM Bangalore, India. Current Program Committee Kishore Kothapalli, IIIT Hyderabad, India (co-chair) Suresh Purini, IIIT Hyderabad, India (co-chair) Mainak Chaudhari, IIT Kanpur, India Arun Chauhan, Indiana University, USA Jatin Chhugani, Intel USA Pradeep Dubey, Intel, USA Manjunath Kudlur, Nvidia, USA Subodh Kumar, IIT Delhi, India Kamesh Madduri, Lawrence Berkeley National Laboratory, USA Krishna Nandivada, IBM IRL, India P. J. Narayanan, IIIT Hyderabad, India Yogish Sabharwal, IBM IRL, India KEYNOTE Speaker: Peter Hofstee (IBM) Title of the Talk: Will be announced soon.

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