You are here: Home / Par4All / Presentations / Par4All: Auto-Parallelizing C and Fortran for the CUDA Architecture

Par4All: Auto-Parallelizing C and Fortran for the CUDA Architecture

A presentation at the nVidia GPU Technology Conference
When Sep 30, 2009 12:00 AM to
Oct 02, 2009 12:00 AM
Where Fairmont San Jose 170 South Market Street San Jose, CA 95113
Attendees Ronan Keryell, Pierre Fiorini, Stéphanie Even
Add event to calendar vCal
iCal

Speaker(s): Ronan Keryell, HPC Project, Christopher Carothers, RPI, Béatrice Creusillet, HPC Project, Serge Guelton, Institut Télécom/Télécom Bretagne and François Irigoin, Mines Paris Tech

Abstract:Par4All in CUDA is a new tool to translate C and Fortran code to CUDA to help programmers accelerate their codes using GPU computing. It is a tool based on the PIPS source-to-source framework that is developed by Mines ParisTech and others for 20 years and is one component of the new Par4All open-source initiative from HPC Project to promote parallelism. Par4All in CUDA uses an abstract interpretation framework based on linear algebra to compute many interesting properties in the program being analyzed. Region analysis is able to compute the array regions used and produced by any program statement. This information is used to parallelize nested loops, allocate the needed data on the GPU and generate communication primitives between the GPU and the host.

More information about this event…

Document Actions

Filed under: , , , ,
« October 2017 »
October
MoTuWeThFrSaSu
1
2345678
9101112131415
16171819202122
23242526272829
3031