CASES 2010 (International Conference on Compilers Architectures and Synthesis for Embeded Systems)
24-29 Oct. 2010, Scottsdale, AZ.
When |
Apr 11, 2010 12:00 AM
to
Oct 24, 2010 12:00 AM
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Where |
Scottsdale, AZ.
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About CASES
The CASES conference provides a forum for emerging technology in embedded computing systems, with an emphasis on compilers and architectures for embedded systems. CASES is a common forum for researchers with an interest in embedded systems to reach across vertically integrated communities and to promote synergies. As evident from the past CASES meetings, several emerging applications are critically dependent on these interactions for their sustained growth and evolution.
CASES 2010 is part of the 2010 Embedded Systems Week.
Paper Submission
Papers should be submitted electronically in PDF format. Submissions should be around 5000 words and no more than 10 double-column pages, with 1 inch margins and 11 pt font or larger. Include a 100 word single spaced abstract in the first page of the paper. Please make sure your paper prints satisfactorily on the 8.5"x11" (letter) format, this is especially important for countries where A4 paper is standard.
Reviewing will be double blind and authors must conceal their identity. Submissions not adhering to these guidelines may be summarily rejected at the discretion of the chair.
As in the past, the Program Committee may elect to accept some papers for poster and/or short paper sessions.
Areas of Interest
Previously unpublished papers containing significant novel ideas and technical results are solicited. Conference topics include, but are not limited to, the following areas.
Compilers
compilation techniques and compilation flows
compilers for low power, performance, reliability
Instruction-level parallelism for VLIW, EPIC andsuperscalar
programming paradigms for multi-core systems
Architectures
multi-core system-on-chip
on-chip communication architectures
extensible, customizable ASIPs
run-time and design time reconfigurableprocessors and on-chip architectures
memory architectures: memory management,smart caches and compiler controlled memories
novel nano-based architectures
3-D architectures
Synthesis
synthesis of hardware software systems
thermal and power-aware synthesis flows
synthesis for reliability, low power, performance
3-D integration and synthesis
Embedded Systems
specification and design
models of computation
modeling and management for power/thermal,performance and reliability
analysis techniques for embedded systemincluding design space exploration, co-simulation
validation, verification, and debuggingtechniques of embedded software
static and dynamic timing analysis
domain specific embedded applications