March 1, 2011 - Special Issue on Real-Time Image Processing on Multi-Cores, Many-Cores and High-level FPGA-based Platforms
Special Issue on Real-Time Image Processing on Multi-Cores, Many-Cores and High-level FPGA-based Platforms
Call for Papers
Image and video processing is one main candidate to parallel processing on new low cost multicore (CPU), many core (Cell, GPU ...) and FPGA. Real time is now achievable with tight coupling of camera/sensors with computing resources (CPU/GPU/FPGA). This allows new applications/solutions where real-time execution is a key aspect. Parallelism is still an important challenge even in the field of image and video processing. New algorithms, data structures, architectures, libraries need to be developed to benefit from the use of multicore/many-core/FPGA technologies. We encourage both scientific papers as well as one or two tutorial papers. Topics of interest include, but are not limited to:
• Real-time image and video processing algorithms aware of multi-core/many-core/FPGA architecture constraints
• Image and video processing libraries and tools on multi-core/many-core/FPGA
• Exploration of image and video processing algorithms and comparison of multi-core, many-core and FPGA
• Parallel programming models targeting image and video processing for multi-core/many-core/FPGA and clusters of multi-core/many-core/FPGA
• Case studies demonstrating how the real-time multi-core/many-core/FPGA implementation of image/video processing enables new services/ applications or increases the performance and efficiency of existing ones
Before submission authors should carefully read over the journal’s Author Guidelines, which are located at http://www .hindawi.com/journals/ivp/guidelines.html. Prospective au- thors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking Sys- tem at http://mts.hindawi.com/ according to the following timetable:
Lead Guest Editor Dominique Houzet, GIPSA-Laboratory/Grenoble-INP,
38031 Grenoble, France; dominique.houzet@grenoble-inp.fr Guest Editors
Horst Bischof, University of Graz, 8010 Graz, Austria; bischof@icg.tugraz.at
Patrick Horain, Telecom SudParis, 91011 Évry, France; patrick.horain@telecom-sudparis.eu
James Fung, NVIDIA Inc., USA; jfung@nvidia.com
Manuscript Due: March 1, 2011
First Round of Reviews: June 1, 2011
Publication Date: September 1, 2011
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